July 1-3 2015
This introductory course aims at helping students, researchers and engineers having little or no background in magnetism to better understand the physics and working principles of this new class of magnetic memories called MRAMs (Magnetic Random Access Memories) based on magnetic tunnel junctions. These MRAM and particularly the STT-MRAM (Spin-Transfer-Torque RAM) memories are attracting an increasing interest in microelectronics industry. In a report published by the ITRS (International Roadmap on Semiconductors) in 2010, they have been identified with Resistive RAM as one of the two most promising technologies of emerging non-volatile memories allowing scalability to and beyond the 16nm technology node.
The courses will be organized during two and a half days. They will cover various aspects of MRAM technology: the basic spintronics phenomena involved in MRAM, the materials, the various categories of MRAM (pros/cons, performances, degree of maturity), comparison with other technologies of non-volatile memories in terms of working principle, performances, foreseen applications (Phase Change RAM and Resistive RAM), the fabrication process, and the perspectives of low-power electronic circuits based on this hybrid CMOS/magnetic technology. The course language will be English. This will be the third edition of InMRAM. The two first editions were quite successful with respectively 110 and 80 attendees from all over the world and coming from both academic laboratories and companies. This year, each attendee will have the choice between two introductory tutorials (1st July morning): one on magnetism and one on microelectronics for those attendees having respectively no background in magnetism or in microelectronics. Two tutorials comparing MRAM technologies with PCRAM and RRAM technologies in terms of working principles and performances but also in terms of actors and markets are included in the program. A poster session will be organized the first evening to allow PhD students and post-docs to present their work. The afternoon of the 3rd day (July 3rd), each attendee will have the opportunity to either visit SPINTEC or attend a training on tools for the design of hybrid CMOS/magnetic circuits.